                                       CR0

Control Register 0


Graphical Breakdown:

bits
      31       29             18       16       5                 0
      [PG|CD|NW|               |AM| |WP|        |NE|ET|TS|EM|MP|PE]
       |   |  |                  |   |           |  |  |  |  |  |
       |   |  |                  |   |           |  |  |  |  |  |
Paging *   |  |                  |   |           |  |  |  |  |  |
Enable     |  |                  |   |   Numeric *  |  |  |  |  |
           |  |        Alignment *   |   Error      |  |  |  |  |
    Cache  *  |         Mask         |   Enable     |  |  |  |  |
    Disable   |                      |              |  |  |  |  |
              |              Write   *    Extension *  |  |  |  | 
          Not *               Protect       Type       |  |  |  |
  Write-Through                                        |  |  |  |
                                               Task    *  |  |  |
                                                Switched  |  |  |
                                                          |  |  |
                                                  Emulate *  |  |
                                                   Numeric   |  |
                                                   Extension |  |
                                                             |  |
                                                      Math   *  |
                                                      Present   |
                                                                |
                                                      Protected *
                                                       Mode
                                                       Enable
                                                       

Control Register 0 is a 32 bit register that is used by 386+ Processors
in protected mode.  Reset state is 60000010h

CR0 is available on 386+ processors.
